1. Field of the Invention
This invention relates to memories for integrated circuit semiconductor devices and more particularly to capacitors for random access memories.
2. Description of Related Art
In the prior art polysilicon (poly) plate capacitors have been formed with an internal structure of polysilicon 2 (poly 2), a layer of ONO and an outer layer of polysilicon 3 (poly 3). In the past, it has been necessary to dry etch using a photoresist mask to remove all polysilicon layers and the ONO layer at the edges of the device. The problem for dry etching is to etch this structure with an angle on the order of from about 80.degree. to about 90.degree..
U.S. Pat. No. 5,116,776 of Chan et al "Method of Making Stacked Capacitor for DRAM Cell" teaches a method of forming a DRAM cell including a capacitor. It teaches patterning and etching to define the storage plate of a charge storage plate of a capacitor by first applying a layer 52 comprising a thin grown oxide layer followed by a deposited nitride layer, which are the first two layers on an ONO structure, except that the last oxide layer has not yet been formed. Regions 54 and 56 are then etched down to the polysilicon layer 26 using an anisotropic etch. Following the etching, the, layer 52 is subjected to an oxidation step which converts layer 52 into an ONO dielectric. A polysilicon layer is oxidized with anisotropic etching back of the resultant oxide to form an oxide spacer for isolation of one polysilicon layer from the next polysilicon layer, referred to as polysilicon isolation.